Cadence PCB Design Blogs: RF SiP

Cadence PCB Design Blogs What's Good About RF SiP and Data Management? Look to 16.6 and See! Posted: 04 Dec 2012 10:05 AM PST The 16.6 Allegro RF SiP product has 3 major enhancements to improve your productivity. Read on for more details … Data Management of Virtuoso SiP Views In release 16.6, Virtuoso SiP Architect is enhanced to support data management of SiP views through the Virtuoso Library Manager. To enable this, files generated in the Virtuoso-SiP Layout flow are now generated in the lib:cell:view format. Starting in the 16.6 release, if you launch SiP Layout from Virtuoso and run the export chips with connectivity command, two views - connectivity and chips - are generated below the cell name. Similarly, while designing a co-design IC, when you export the die data from Virtuoso Layout Editor, the generated die abstract file, <cellName>.dia, is saved in the die_abstract view. If you have data management enabled for Virtuoso, the following SiP views will also support check-in and check-out of the files: •    connectivity --This view contains the connectivity.csv file with information about cell connectivity. •    chips -- Contains package data for the symbol generated after die export. •    die_abstract -- Contains the die data extracted as .dia file. These views also support the Auto checkout feature. During an operation, if the view to be updated is check-in and auto checkout is enabled, you are not prompted to check-out the file. To enable the auto checkout feature in the batch mode, you need to set the rfsip_autocheckout_batchmode environment variable. In this case, all the checkout messages are listed in the Command Interpreter Window (CIW). Import Die Abstract Enhancements The import die abstract feature in Virtuoso Layout Editor (VLE) is enhanced to support auto-backup of original IC-layout during die-import. You have an option to enable or disable the backup creation feature. With this option enabled, every time you import the die abstract (.dia) file, a original die layout is saved in the layout_bkup view. Besides this, the difference viewer has also been enhanced. You can now specify the tolerance values for various properties and if the changes are within the specified tolerance, they will be ignored. Die Abstract File Enhancements Starting this release, when you export die data using .dia files, the shapes, such as polygons and circles, defined in the Area Transfer are also transferred. This functionality allows you to use to use die abstract files to transfer shapes -- such as company logos -- from Virtuoso SiP Architect to SiP Layout. Please share your experience in using these new features. Jerry "GenPart" Grzenia

Cadence PCB Design Blogs : Allegro PCB Editor Stipple

Cadence PCB Design Blogs What's Good About Allegro PCB Editor Stipple Highlighting? See for Yourself in 16.5! Posted: 23 Oct 2012 09:09 AM PDT The 16.5 Allegro PCB Editor now has the added ability to accentuate objects and layers in Allegro PCB Editor by providing pattern support. Read on for more details … Stipple pattern support is provided through the assign color, highlight and color commands. The assign color command allows you to assign custom stipple patterns to objects in addition to assigning the color and default highlight patterns it currently supports. The highlight command allows the assignment of a stipple pattern to objects only. No color assignment is done. This is the main difference between the highlight command and the assign color command. The find filter options for this command are the same as the assign color command. In order for stipples to be seen you must not have the variable "display_nohilitefont" enabled:   The Color dialog has been enhanced to allow stipple pattern assignment to layers. Assigning a pattern to a color cell is applied to all corresponding objects on that layer:   Assign Color command Stipple patterns have been added to the Options form associated with the "Assign Color" command. A pull down is also provided to enable or disable pattern assignment. The pull down states are - •    Solid •    Selected Pattern - The selected color and pattern are assigned to objects. Selected pattern is displayed in 'Selected pattern' button. The first pattern is the standard default "candy cane" stripe that was used in previous versions of Allegro PCB Editor:   Highlight command This command assigns stipple patterns to objects without affecting the object color. A stipple pattern can be selected from the pattern buttons in the Options form. Selecting the first button deselects the active pattern. Highlighting fixed elements A new color dialog enhancement helps identify fixed objects by stipple pattern overlays. Assign any one of the available 15 stipple patterns to the new Fixed Object entry located in the Display folder of the dialog:   Check out the movie ! As always, I look forward to your feedback on this new 16.5 capability. Jerry "GenPart" Grzenia

Cadence PCB Design Blogs What's Good About ADW's Multiple Shopping Lists? Check out the 16.5 Release and See! Posted: 15 Oct 2012 09:04 AM PDT The 16.5 Allegro Design Workbench (ADW) now supports multiple shopping lists. In a nutshell, multiple shopping lists support these capabilities: •    Provide viewing multiple lists from: –    One or more common list directories –    One or more other project directories –    One or more specific files –    Lists created from an outside source in the proper format can be referenced •    Functions for: –    Adding part to schematic –    Adding part to current project shopping cart –    Show details •    Library Validation: –    Verifies all entries are in reference library –    Displays all messages and icons according to part status •    Configuration: –    Manual entry into .cpm file ( project.cpm or site.cpm) –    GUI Based path/file configuration in CB       As always, I look forward to your feedback! Jerry "GenPart" Grzenia Customer Support Recommended – Working with PADS to Allegro PCB Editor Translator Posted: 09 Oct 2012 07:00 AM PDT A recently published AppNote on converting a PADS ASCII file to Allegro PCB Editor has eased the life of many users by providing a step-by-step methodology and appropriate debugging techniques. It also covers various scenarios where Allegro PCB Editor generates errors or warnings during the translation, and explains how to debug errors and obtain a neat board file (.BRD) to be used in Allegro PCB Editor. The PADS translator can be launched from File > Import > CAD Translators > PADS, from within Allegro PCB Editor. This translator converts the PADS database files (.asc) into Allegro PCB Editor board database files (.brd). It is assumed that the PADS database being translated is completely placed and routed.   Prerequisites for running the translator PADS ASCII file. (.asc) PADS Layout creates an ASCII database version file (.asc), which contains all information about decal, part type, part, signal (logical connectivity), route (physical connectivity), and graphics.The component mapping from PADS ASCII file to Allegro prototypes is as per the table given below:   Options file (.ini) This is the PADS to Allegro PCB Editor Layer mapping file. The accuracy of the translated Allegro PCB Editor .brd file depends on the accuracy of the Copper layer mapping in the layer mapping file (Options File). The default pads_in.ini file is located at <Cadence_Install_Folder>/tools/pcb/bin location. It is advised to have a copy of the default pads_in.ini file in the work area and modify it accordingly. Steps involved in the translation 1. Create a PADS ASCII file from the PADS job file (.pcb). 2. Create an options file and map the PADS and Allegro PCB Editor layers. 3. Execute the translator. 4. If there are any errors, the translation fails. Open the pads_in.log file to view the errors. 5. Correct the errors either in the .asc or .ini files. At times you may need to recreate the .asc file. 6. Re-run the translator. 7. Open the translated .brd file and review all aspects (pad geometries, symbol geometries, stackup, shapes, and so on) of the design for completeness and correctness. Note that the translator does not guarantee 100% translation of everything. You need to edit the design that can be maintained completely within Allegro PCB Editor. The pads_in application reads the input file and determines the number of etch/conductor layers it uses. If all required program arguments are not specified, the translation Options dialog box appears as follows: The window above allows the users to modify the pads_in.ini file before translation begins. Avoid editing the default pads_in.ini file located at <Cadence_Install_Folder>/tools/pcb/bin, instead, make a copy of the pads_in.ini file in the working folder and modify the same. The PADS to Allegro Layer Mapping fields defines the element-layer mapping. The list box contains all the PADS objects (Lines, Copper, Text, Decals, Pads and Vias) and the name of the class and subclass to be mapped with in Allegro PCB Editor. Although the default mapping is done according to the pads (.asc) file, users can map the class / subclass name if needed. Each element appears once for each PADS layer, for a total of 31 entries per element. All 2D lines on PADS layer 0 are mapped to the BOARD/SUBSTRATE GEOMETRY class and the subclass ALL, which is not pre-defined. Lines on PADS layer 1 map to the ETCH/CONDUCTOR class and the subclass TOP/SURFACE and so on. The translator presets all-necessary ETCH/CONDUCTOR class mappings by default, even if a previous translation created the options file. This is also true during batch translations. Files Generated during translation The following files are generated in the output directory after translation is complete: Most of these are temporary files generated for use by the translator. They remain in the output directory only for reference. The key file is the Allegro PCB Editor board (.brd) file, which is the output from the translation. Refer to the complete AppNote for a detailed procedure about each of the steps involved in the translation and about the known problems and solutions. Note: The above link can only be accessed by Cadence customers who have valid login credentials for Cadence Online Support (http://support.cadence.com). This posting includes an audio/video/photo media file: Download Now

Cadence PCB Design Blogs What's Good About DEHDL's Page Search? The Secret's in the 16.5 Release! Posted: 09 Oct 2012 06:30 AM PDT Prior to the 16.5 release, the search capabilities in Allegro Design Entry HDL (DEHDL) have been quite limited. This has changed in the 16.5 release with the introduction of a new toolbar for page level search and an Advanced Search and Navigate functionality.   Read on for more details … The Page Search option enables you to search for text on the current page. The text can be a symbol text, net name, property or part of a note:   The result is displayed in a docking window which can be docked on any side of the DEHDL window.   The Search Results window contains default columns displaying: a. Design Name b. Physical Page Number c. Object Type d. Object Name with Path Property for Components e. Property Name f. Property Value   The result rows display the different objects on which text has been found. When you double click one of the rows, it will navigate and zoom in to display the object. You can select the contents of the window and copy them to the clipboard to paste in a text file or Excel worksheet. This window also displays the number of results found and the time taken to search them.   Detailed steps to search the text on the current page:   1. In the Page Search toolbar, specify the text to be searched and press 'Enter' key. 2. The current page is searched for the text and the results are displayed in the docking window. 3. In the docking window, you can:     a. Sort the results     b. Filter the results     c. Double click on a row to navigate to the object. I look forward to your feedback! Jerry "GenPart" Grzenia

PCB SI Static IR Drop Analysis

Cadence PCB Design Blogs What's Good About PCB SI Static IR Drop Analysis? 16.5 Has Many New Enhancements! Posted: 02 Oct 2012 06:45 AM PDT In the Allegro PCB SI 16.5 release, static IR drop analysis has been integrated into PDN (power delivery network) analysis, with several new features added, such as current density display and the display of current direction. Read on for more details … Analyze Menu To invoke Static IR Drop analyze, select Analyze > Static IRDrop Analysis at the bottom of the PDN Analysis form:   This will open the following window:   Field Solver Preferences If you select the Preferences button and select the Field Solver tab, you can see the field solver options in the bottom section: In this tab, you can select to use the full wave model (for high frequencies) or equivalent circuit (for low frequencies) since this option does not affect static IR drop analysis (Static IR drop will calculate the resistor with equations based on the mesh). You can ignore some layers which will ignore all shapes of the specified layers during the modeling. The ambient temperature will be used for static IR drop analysis and PI analysis, the surface roughness is used for PI analysis, and the debye model can be used for future model extraction. Saving Analysis Results By default, the analysis results will be saved using the .brd file name with different extensions. If you want to run multiple simulations for the same board file with different settings, you can change the session name for each simulation to store the results. Otherwise, the previous results will be overwritten by the new analysis. Select the Session button in the Static IRDrop Analysis dialog. This will open the Session Name dialog:   Display Options The Options pane in Allegro PCB SI contains information specific to IRDrop analysis:   The default layer to Review is Top. This layer may or may not have any shapes on it for the DC Nets that are being analyzed. Use the Review pulldown in the Options pane to select a specific layer in the design:   The color contour that appears depends on several factors: the actual analysis results, the threshold values set in the main dialog, and the Color Legend. Selecting a point on a net that was analyzed will display the value at that location in the Options pane:   To see the display options for static IR drop, right click in the PCB SI canvas to see the menu:   The Set reference command allows you to pick a reference point in the design which will be graphically displayed on the canvas. Subsequent probe points will be displayed in the Options pane with the actual drop value at that point and the relative voltage value to the Reference point. In the Options pane, select the Color Legend radio button, and you will see the following:   In previous releases, this legend was fixed. To change the color legend, select the Custom button in the Options pane to open the Color Legend dialog:   You can set different color legends for different result (current, voltage, impedance, density, and temperature rise) by selecting the Format pulldown and the Method options. Use the RMB menu to select the other Display options for IRDrop analysis - Display Mesh, Display Current, Display Density, and Display TempRise. If you are just running IR Drop, it is not necessary to run the Mesh analysis separately. The mesh that was generated for IR Drop can be accessed using RMB > Display Mesh. If you RMB select 3D EMViewer, the 3D result will be displayed in the 3D EMViewer:   Please share your experiences with this new 16.5 capability. Jerry "GenPart" Grzenia

ADW’s Flow Manager

Cadence PCB Design Blogs What's Good About ADW's Flow Manager? Check out the 16.5 Release and See! Posted: 11 Sep 2012 08:18 AM PDT The 16.5 Allegro Design Workbench (ADW) Flow Manager has been enhanced to provide a more flexible and robust designer experience. It can now be launched in a stand-alone mode, is faster in launching, can open multiple flows, and you can customize it by adding new buttons! Read on for more details … Here's a screenshot of the new Flow Manager: You can open the last project, and select from a list of last used design or library projects: There are project type icons show in the list: Tabs are available to indicate multiple open projects: Message Manager A new messaging system is available to communicate at the company, site, or team levels. The Administrator can construct/edit/view all messages, and all others can view messages. These messages are all viewed from within the Flow Manager. When a new message arrives, the message button will highlight and you can view the new message: Here are all the options (from sorting, selecting message has been read, etc.) available: Here are the authoring options available for the Administrator: Flow Manager New Features You can now track your progress of steps through the flow: –    Completing a step automatically moves focus to next step –    Step status automatically set to "inprogress" when an activity is detected (button pushed or checklist unchecked) –    Step is automatically marked complete when checklist is complete –    Checklists can be order-dependent (if one checklist item is unchecked – all remaining items uncheck)   As always, please share your experiences in utilizing these new capabilities. Jerry "GenPart" Grzenia