Cadence PCB Design Blogs: RF PCB and Autoplace

Cadence PCB Design Blogs What's Good About RF PCB and Autoplace? 16.6 Has Many New Enhancements! Posted: 03 Apr 2013 08:04 AM PDT The 16.6 Allegro RF PCB application has many new enhancements. I'll cover a few over the next several weeks. Here are some major autoplace related enhancements: Grouping in Design Entry HDL (DEHDL) Allegro PCB Editor Enhancements Read on for more details … Autoplace is a very important step for RF layout after the schematic is transferred to PCB layout. The system will automatically create groups based on connectivity during the autoplace process. This will result in many groups in autoplace and it's difficult to find the proper groups to do autoplace. Designers like to define groups in the schematic based on functions such as LNA, pre-amplifier and so on and then select the proper groups to start autoplace.   In 16.6, we've added some new commands in DEHDL to support grouping, such as add group, disband group, display group and so on. In this case, designers can easily control the groups for autoplace. The detailed commands are:   Add Group will attach a property (RFGROUP) to the selected components. Add Split will attach a property (RFSPLIT) to the wires selected. If a wire is attached with this property, then the logic group will be broken at here (one big logic group will be split into two logic groups). Disband will remove the RFGROUP property from each RF component for the specific group. Exclude will remove the property for selected objects (RFGROUP for RF components or RFSPLIT for wires). Display Group will highlight/report the RF components within a specific group. Display Split will highlight all wires with the RFSPLIT property. All these commands are only available in the DEHDL pre-selection mode. When you transfer the schematic to layout and launch autoplace, you will see the groups are classified differently, the group names added in schematic are reflected in the autoplace form:   You can use the Group filter to easily find/locate some specific groups to do autoplace. RF Grouping in the Front End (DEHDL) To use the grouping functionality in the schematic, you need to select Tools->Options and check the "Enable Pre-select Mode." You will see the RF PCB menu as follows:   If you check "Enable Windows Mode" as well, then Import IFF… item will not be available under the RF-PCB menu. You can find it from File->Import->Import IFF…->RF-PCB. Add Group You need to first select some RF components (or non-RF components) and then click RF-PCB->RF Group->Add Group. The following dialog will pop up:   You can enter a new group name or select an existing group from the drop-down list. If the existing group includes elements outside the current page, you need to select Module radio option. You can only select the components in current page to add to a group.   Add Split Select a wire or multiple wires and then click RF-PCB->RF Group->Add Split. The RFSPLIT property will be attached to the wires selected. You can't select wires crossing pages to add split. That means you can only select the wires in the current page for this command. For example, in the schematic, two wires are attached with the RFSPLIT property as following:   There will be three logic groups in the layout for autoplace even though they are actually connected together logically: Disband Click RF-PCB->RF Group->Disband. The following dialog will appear:   All available groups will be listed in the drop-down list. Select a group and select the proper scope and then Apply to disband the group. The RFGROUP property will be removed from each component of the group. Exclude Select one or more components with the RFGROUP property attached or one or more wires with the RFSPLIT attached and then click RF-PCB->RF Group->Exclude. The property will be removed for the selected objects. This command also works for the current page objects only. Display Group Click RF-PCB->RF Group->Display Group. The following dialog will appear:   You can display one group from the drop-down list or all groups by selecting All from the drop-down list. To display a group including elements in other pages, you can select Module radio option. Click Apply or OK. All components within the selected groups will be listed in the command line if the module option is selected, and the components of the selected groups will be highlighted in the current page. Display Split Click RF-PCB->RF Group->Display Split. The following dialog will appear:   OK to highlight the wires with the RFSPLIT property in the current page. To get the description of each wire with the RFSPLIT property within the current page, select Page option. To get the description of each wire with the RFSPLIT property in the whole design, select Module option. Enhancements in Back End (Allegro PCB Editor) In layout, launch RF-PCB->Autoplace. The dialog will appear: All components will be classified into different logic groups. Each logic group will have a name with the prefix "_rfGroup". If you have already defined a group in schematic (for example ABC), then this name will be the name for a real physical group in layout. This name will be attached following the logic name within brackets such as _rfGroup1(ABC). Some other enhancements for autoplace are: •    Add a new check box "Ignore FIXED property" •    A new mark "A" for the groups just completed autoplace •    A filter to find/locate a group •    Ratsnests display during autoplace •    Moving clearances •    Performance enhancements   If you check the "Ignore FIXED property" option, then a fixed component can be moved as well during the autoplace. There are two kinds of marks for the groups. A group with a "P" mark means this group is already placed into canvas before the autoplace command launched. A group with an "A" mark (green color) means this group completed the autoplace in the current session. A group without any marks means this group is still unplaced and you may need to do autoplace for it. The autoplace is enhanced to show the ratsnests while the dynamic path is attached to your mouse during the autoplace process. This makes it is easy for you to place the group to the proper location:   Another enhancement is to support the clearance moving as well for the autoplace--for example, after completing the autoplace for a logical group and then adding the clearances for the components within the group. If you redo the autoplace and move to a different location to place the group, the clearances will be moved as well. Before that, the clearances will not go with the RF components:   Please share your experiences using these new capabilities. Jerry "GenPart" Grzenia Email delivery powered by Google

Cadence PCB Design Blogs: PCB Editor Generic Cross-Section

Cadence PCB Design Blogs What's Good About Allegro PCB Editor Generic Cross-Section Files? See for Yourself in 16.6! Posted: 09 Apr 2013 08:47 AM PDT Beginning with the Allegro PCB Editor 16.6 release, you are provided a methodology to export a technology (.tcf) or constraints (.dcf) file which is a generic cross-section. A generic-cross-section file (GCSF) captures constraints for specific layer types. Currently, a GCSF supports four types of layers: TOP, INTERNAL (internal signal), PLANE, and BOTTOM. Importing a GCSF will not update the design's cross-section, but will update the design's constraint information (electrical, physical, and spacing) based upon the current import modes (overwrite, merge, and replace). When a GCSF is imported into a board, constraints from that techfile will be mapped as follows - 1.    TOP - TOP (topmost etch layer) 2.    INTERNAL - signal layers between TOP and BOTTOM 3.    PLANE - all plane layers 4.    BOTTOM - BOTTOM (bottommost etch layer) Generating a GCSF 1. Open an existing board or create a new one and edit constraints. 2. In Constraint Manager, use File > Export > (Technology file or Constraints file):   3. Select  the "Generic" radio button  in the "Export cross-section" section. The "Generic" radio button is enabled only if the "Physical & spacing constraints" box is checked. The "Configure" button is enabled only when the "Generic" radio button is selected. The "None" radio button is enabled only if "Physical & spacing constraints" box is not checked – otherwise cross-section data is necessary. 4. Click the "Configure" button if you want to select the layers you would like to use as TOP, BOTTOM, INTERNAL, and PLANE (layer mapping):   This step is optional. If generic cross-section is not configured, the default mapping will be used. User selections are remembered only for the current dialog form – when you invoke the export dialog again, the default mapping will be used. Default mapping:     TOP:            first etch layer     INTERNAL:   first signal layer after TOP     PLANE:        first plane layer     BOTTOM:     last etch layer To exclude a generic layer from the techfile, select <IGNORE>: In the situation shown in the screenshot above, the resulting generic techfile will have only three generic layers – TOP, PLANE, and BOTTOM. Importing GCSF Open Constraint Manager and select File > Import > (Technology file or Constraints file). Select the GCSF that you have exported from a different database and choose an Import Mode (overwrite, merge, or replace). If in the imported GCSF some of the generic layers are ignored, then layers matching the ignored layer will not be changed. This is what the report will look like:   Note: When a GCSF is imported, the cross-section of the original board stays intact (i.e. the number of layers, their names, and characteristics remain as before importing; only the Csets are imported). The GCSF techfile units will behave the same way as any other techfile units. A suggested approach would be to have the same units used in both the original and the target board. I look forward to your feedback! Jerry "GenPart" Grzenia Email delivery powered by Google

Cadence PCB Design Blogs: DEHDL’s Constraints Comparison

Cadence PCB Design Blogs What's Good About DEHDL's Constraints Comparison? The Secret's in the 16.6 Release! Posted: 16 Apr 2013 06:40 AM PDT The Allegro 16.6 Design Entry HDL release provides designers a mechanism to compare two databases for constraint differences. The databases that can be compared are of the following types: • Schematics (.cpm) • Layout design (.brd, .sip, .mcm) • Constraints Manager Database (.dcf, .tcf) The Constraint Comparison Utility can be used for comparing two different revisions/versions of the schematic or board databases. This utility can also be used for comparing the schematic database with the board database. A report is generated as a result of the comparison and lets you see all the changes which have been made to the design database since it was last synced up. This report helps you ensure that none of the constraints are conflicting and thus might overwrite on sync up. The utility can be integrated in any of your design flows where you feel that you need to see the constraints differences in two databases before proceeding further in the design. The utility can be invoked from the command line using command cmDiffUtility. This command launches the Cadence Constraints Differencing Utility dialog box, as shown below, where you can specify the two databases which need to be compared for constraints differences:     The   button (browse) can be used to select the database. Once you click this button, the file selection dialog box appears. This dialog box displays the files based on the file type filter. By default the filter is set to "Constraints Files (*.dcf, *.tcf)". You can select any of the following options to change the filter setting and select appropriate databases:   Once both the databases are selected, the "Compare Files" button is enabled. Click this button to start the database comparison. The results of comparison between the two databases are reported in a Firefox window:   The report is displayed as a single screen, with two frames – left frame containing the object tree and the right frame containing the details of the selected tree item. The complete report contains hyperlinks and helps in navigating through any of the objects within the various tools – Design Entry HDL, Allegro PCB Editor, Constraint Manger. When you click a category in the tree in the left frame, the details containing lists of all the objects of that category are opened in the right frame. These details contain the object name and brief description of the changes observed. All the object names are also hyperlinked. You can click any of the objects to view more details. The object names are also visible in the tree view in the left frame, and the detailed view can also be opened by selecting the object name there. Since the different object categories are listed in the tree view, you will notice that you can navigate to the same difference from multiple places.  Please share your experiences using this new feature. Jerry "GenPart" Grzenia Email delivery powered by Google