After last week's very short blog post, this week's post is quite lengthy. I'd suggest you read the opening paragraphs and watch the video first and then dive deep into the details.
IC package designers normally consider the package BGA component as a part of the package design and therefore changeable. In addition, the IC design team may be developing one or more of the dies within the package or system in package (SiP) concurrently with the package, and thus the package designer may be able to suggest die changes. This means that the package designer may need to be able to add, remove, rename, or move pins and even change the body size of die and BGA components during package layout.
As system designs become even more complex and dense, customers are becoming increasingly dependent on system-level floor planning, partitioning and concurrent design. As a result, PCB/Package co-design is becoming a vital requirement for systems customers. Thus, PCB designers now require a subset of component editing capabilities currently found in the package layout tools in order to support co-design changes to the BGA for an ASIC from the PCB design.
To support this need, Cadence IC Packaging tools have incorporated an inline Die / BGA symbol editor since the 14.2 release. This tool has given the user the ability to modify the symbol and component by adding, moving, and removing pins, changing characteristics like padstacks or swap / pin use codes, and many other capabilities.
Most importantly, the editor gives access to this rich feature set within the context of the overall package design. The designer is able to move a pin while visually seeing the impact of the move on any attached routing or balls, and to get real-time DRC updates when they make a change. With the die editor in concurrent co-design mode, changes are even visible real-time inside the IC design via an MPS communication link between the package and IC design tools.
However, these have always been complex commands which require the caching of all information about the component under edit, and then build a representation of the component which the user is able to edit. This is necessary as there were no functions to directly edit the component or symbol without first rebuilding the associated component and symbol definitions. As this is a time consuming process, it is not feasible to do before and after every operation.
With the 16.5
Allegro Package Designer changes added, this feature will allow the user the flexibility to edit any changeable symbol in the design (as allowed by the active editor license) by changing to the Symbol Editor application mode and directly modifying the pin pattern or other properties. This will significantly enhance the productivity of the user and enable them to better trade off changes to the BGA or die pad layout versus changes to the substrate routing or wire bond pattern to achieve the lowest cost board or package possible.
Read on for more details …
There are a lot of details about this functionality. It might be best to
watch a video of this feature before reading the exhaustive information below.
Design Flow Impact
This change may seem like a dramatic design flow impact, but it is really not. The user will still be performing the same edits that they do today, but the manner in which they do them will be much faster and more intuitive. It will also better align with the use model of the rest of the tool. The user will still be able to edit the component at any point during the design flow.
Performance Requirements
Performance will be heavily based on the complexity of the component under edit and the operation being performed. For example, deleting a single pin will be much faster than redefining the pin placement grid and causing all pins to be moved and renumbered.
Symbol Editor Application Mode
In order to edit a component/symbol in a package layout or PCB database, the user must enter into the symbol editor application mode. This will prep the tool and update the RMB buttons to give access to appropriate commands for this class of operations.
Two of the more common flows are described below:
Defining a Pin Grid
In the old symbol editor, to define a grid, the user would go to the grids tab of the form, change to the "add" mode, configure the form settings, and then digitize the extents of the grid in the database.
In the new use model, the user will select the component to add the grid to, RMB, and select the "add grid" command. This will open a ministatus panel that will provide them with the ability to define the pin pitch settings for the grid. The user configures these settings then digitizes the extents of the grid, as in the old use model. At this point, the tool will snap any pins in this region to the new grid settings and alert the user to any changes that will result, giving them the option to oops the changes before the component is modified.
By default, new grids start with the "Customized" pin number scheme. This prevents any inadvertent pin number changes caused by snapping. If the user wishes a different numbering scheme, they can select the new grid, RMB, and select the pin number settings option to configure these settings. Doing so will automatically update and pin numbers for pins belonging to this grid.
Changing a Pin's Padstack
In the old symbol editor, to change a pin's padstack, the user would go to the pins tab, select the "modify" mode, select the pin, update the affected setting (padstack), and press apply.
In the new use model, the user will select the pin(s) to be modified, RMB, and select the change attributes option. This will open a ministatus panel of editable settings. As the user changes these, the pin(s) in the UI will dynamically adjust to the new settings. In this case, the user selects the desired new padstack and immediately sees the changes reflected in the canvas.
Aligning a set of Drivers (Co-design Die Editing Only)
This flow only applies when editing a co-design die in SiP Layout. In the old tool, the user would change to the drivers tab, enable the "align" mode, select the drivers to align, then a reference object to align them to (a line, edge of the die, etc). The drivers would then align to this item.
In the new use model, the user would need to toggle the display of the drivers (if not already visible) by selecting the component to be edited and doing an RMB "show drivers". Then, select the drivers to be aligned, RMB, pick "align" and pick the reference object. No moving to a form or ministatus panel is necessary.
Menu and Command-Line Access
The symbol editor application mode may be invoked from the command line by typing "symbol edit" It can also be selected from the menu
Setup -> Application Mode -> Symbol Edit:
Graphical User Interface
As an application mode, this feature is
heavily based off the RMB menu and the
ministatus panel. We will go through all the various menus and ministatus panels in order based on what the user has selected in the pre-selection buffer.
Overall, whenever a component is under active edit, the user may see the pin count HUD display, shown below, which lists important information for constructing or editing a component based on the number of signals required and power:ground:signal ratio desired. This dialog pops up automatically when the component is first selected, but can be closed by pressing the 'x' button in the corner. Should the user wish the HUD permanently disabled, they can set this through the user preferences menu.
Fig 1: Component Active for Editing, Pin Count HUD
Only four counts are provided. Power and ground give the count of these types of pins, while unused describes unspec and no-connect pins. The remaining pin use types (bi, tri, in, out, oca, and ocl) are grouped under the Signal category.
The Quick Utilities, Application Mode, Super Filter, and other standard commands and menu items listed in all modes below will not be described further here. Their workings have all been defined in other specs for the application modes project.
Common RMB Items (anything selected)
The following appears at the bottom of the RMB menu regardless of what item(s) are selected:
Fig 2: Common RMB Entries
• Component Instance: This shows the item type(s) currently selected, and under the submenu, the commands specific to that object type.
• Application Mode, Super Filter, Customize, and Selection set: Common functionality for pre-selection use model.
Additionally, some menus feature other common entries for other commands, such as show/blank rats, fix/unfix, property edit, and show element. These are not defined in this document as the commands are described elsewhere.
Component(s) / Symbol(s) Selected
When a component is selected and the user does an RMB, they are met with the following popup menu. The section of the popup menu with the driver manipulation commands and the I/O spreadsheet will only appear in SiP Layout, and only if the component is a co-design die.
Note that if the selected comp/symbol is not applicable for pin editing in the editor, or if multiple pins or components are selected, only the options for renaming the comp/symbol and writing the device file will be shown, along with the standard items like Blank Rats and Fix. This applies to a discrete or plating bar component in a package design and most probably discrete and possibly I/O class components in the PCB design, though that specific classification will need to be made by the Allegro PCB product team.
Fig 3: Component(s) Selected, RMB Menu
• Add pin: Selecting this option will allow you to add pin(s) to the selected component. The ministatus panel will display the fields as in Fig 9 later in this document, so that the user can configure the pins. They may then pick or window an area to add pins. The pins added will be snapped to the symbol's defined grid positions.
• Add grid: Not available for co-design dies at this time. Select to define a new pin grid region. This will show the pin pitch configuration in the ministatus (Fig 10), where the user can set up the physical grid information. By default, the new grid will get a pin numbering setting of "customized" to prevent any pin renumbering due to position changes when snapping to the grid. Once the user sets up the form, he digitizes the outline of the grid (selecting two points inside the bounds of the symbol) and the tool automatically adjusts any pins in that region to snap to the new grid. This operation can be opposed if it is not desired, and we will let the user know how many pins changed position or were deleted due to snapping.
Note: This command will be made available for co-design (non feasibility) dies once grids and IC bump arrays are aligned in a future release.
• Rename component: Prompts the user for a new component refdes name. If multiple components are selected, prompts separately for each. Defaults to the current refdes to prevent inadvertent changes, and checks to make sure the new refdes is unique in the design before allowing it to be changed.
• Rename symbol: Prompts the user for a new symbol definition / part name or component (device) name, depending on whether the user selects a component or a symbol. If multiple symbols are selected, prompts separately for each. Defaults to the current symbol name to prevent inadvertent changes, and checks to make sure the new name is unique in the design before allowing it to be changed. When a package symbol is renamed, the Package text reference character string field of the component definition will be updated accordingly.
• Write device file: Select this option to write a current device file to disk for this component. The file will be written to the current working directory. If there is desire, we can prompt the user for the library directory to write this to. However, default behavior should be to CWD, since at this point the library part has not been changed, and this could cause other designs not to work with the device file.
• Edit Boundary: This option will allow the user to either enter new dimensions for the symbol in the ministatus (Figure 7), or select a new bounding shape in the main canvas. Selecting a shape is necessary in order to incorporate notched borders and other geometries after editing the place bound shape of an instance with the shape editing tools.
Note: This option will not be available for co-design dies not in feasibility mode.
• Pin text settings: This will set the ministatus as shown in Figure 8. The user will be able to view / change the settings for pin text on this component. The entire component will be updated to reflect any changes made to the form as changes are made, so that the user can see the effects in the design.
• Place driver: Only visible when editing a co-design die in SiP Layout and the drivers are toggled to visible (see below). Use this command to move an unplaced driver into place within the die's outline. The driver is chosen from a list of drivers (Fig 13).
• Add driver: Only visible editing a co-design die in SiP Layout, when drivers are visible and you are in feasibility mode. Add a new driver instance to the die component. This will impact the netlist, thus it is only available in feasibility mode. The user will then pick the driver definition from the ministatus (Fig 12), which attaches to the cursor for placement. This is a stretch item for the first release.
• Toggle driver visibility: Only available for co-design dies in SiP Layout. Toggles the display of I/O drivers between visible and not visible. The default state is not visible. No ministatus associated with this command. Will also toggle the visibility of the IC manufacturing and site grid(s), if applicable.
• I/O pad ring spreadsheet: Only visible editing a co-design die in SiP Layout, when drivers are visible. Use this menu item to launch the I/O pad ring spreadsheet for the selected die. This constraint-manager based view shows all the drivers in the active co-design die, and is another means of editing their placements. The spec for this command is available in the references section.
• Refresh co-design die: Select this option to browse for a file representing an updated / current view of the selected distributed co-design die or to update the die from the active IOP session for concurrent co-design dies. For distributed, this will refresh the die in the database from the selected file on disk (die abstract .dia or .xda). Any updates made in the packaging tool which have not been exported will be lost and the abstracted stored in the database will be replaced with the new one.
• Compare co-design die abstract: Select this option to compare the current die against a specified die abstract (DIA/XDA/DEF) file from disk. See separate Fspec for additional details on this feature.
Pin(s) Selected
When pins are selected and the user does an RMB, they are met with the following popup menu.
Fig 4: Pins Selected, RMB Menu
• Delete: Select this option to delete the selected pin(s) from the symbol and component. If the pins are part of an auto-numbered grid such as the clockwise spiral pattern, all pin numbers in the same grid will be updated to account for the removed pins.
For pins of a co-design die component, the associated driver cell should be unplaced when its pin(s) are deleted. We may want to log this event in the journal file.
• Move: Select this option after selected pins (must all be from the same component) to move them. If more than one pin is selected, the user will need to pick a reference point/pin for attaching the selected items to the cursor. Then, the user can move the pins to a new location, and also mirror or rotate the pattern through the RMB at this time. The ministatus panel displays the form in Figure 9 to allow the user to update things like pin use or padstack for the new pin location.
Note: For co-design dies, pins that belong to a driver must (at present) be moved by selecting the driver.
• Copy: Similar to the move operation above, except the old instances of the pins are not removed. The user will need to specify new pin numbers / pin names if the target destination for the copied pins is not in an auto-numbered grid.
Note: Copying of pins that belong to a driver is not permitted for co-design dies.
• Swap: Select a single pin, RMB to swap, and then select the second pin. Alternately, select two pins and then do an RMB swap. For non-co-design dies, this effectively moves the pins from one location to the other. For co-design dies, it leaves the pins in place, but swaps nets and logical attributes, and also swaps Function Pins (which means Pin names and Verilog Port names will swap). Pin numbers remain with the grid position.
• Change attributes: This will raise the ministatus panel in Figure 9 to allow the user to change characteristics for the selected pin(s) without danger of an inadvertent move. See the definition of the ministatus fields for all the potential changes that can be made to the pin.
• Change pin number: Selecting this option will raise a text fill-in to allow you to specify a new physical pin number (no impact on logical / signal name) if the pin is not in an auto-numbering grid.
Grid(s) Selected
When grids are selected and the user does an RMB, they are met with the following popup menu.
Fig 5: Grid(s) Selected, RMB Menu
• Delete: Removes the selected grid(s) from the symbol. Any pins in this grid will be snapped to the nearest position in the next highest priority grid under the pin. This is generally the base grid. Note that this may change pin numbers, depending on the pin numbering settings for the deleted grid and pins' new grid.
• Copy: Copy the selected grid. This will copy the grid's size, pitch, and numbering settings. The grid attaches to the cursor and the user can place this at a new location within the symbol's boundary using either the mouse or by specifying the location using the pick/ix/iy commands. The user will need to enter a new name for this grid. By default, it will have the same priority as the original grid.
• Pin pitch settings: Only one grid may be selected for this option to be available. Opens the ministatus information panel shown in Figure 10. This will allow the user to modify the pin pitch settings for the specified grid. Changes to the pin pitch settings are updated in the database on the fly. Note: This command can cause major changes to the pin pattern of the symbol if the wrong values are entered. Any changes which will cause pins to move or be deleted (overlapping pins) will cause a dialog box to prompt the user whether to proceed.
• Pin numbering settings: Only one grid may be selected for this option to be available. Opens the ministatus information panel shown in Figure 11. This will allow the user to modify the pin auto-numbering settings for the specified grid. Changes to numbering settings are updated in the database on the fly. After making changes to the pin numbering pattern, the user will most likely need to write a new device file for use with front to back flows involving logic updates. They will also need to back annotate to SCM or any other front end tool with the changes made.
Driver(s) Selected
When drivers are selected for a co-design die component in SiP Layout only, and the user does an RMB, they are met with the following popup menu. In the section below, whenever it refers to drivers snapping to the manufacturing grid, if there are I/O Site Rows in the design at that location, the drivers will snap to the nearest I/O site position instead.
Note: More detailed discussion of the operations on drivers are available in the 16.3 Package-Driven I/O planning FSpec.
Fig 6: Driver(s) Selected: RMB Menu
• Move: The selected driver(s) will be attached to the cursor, after a reference pick of an origin if more than one is selected. The user may then rotate, mirror, and place the set of drivers in a new location within the bounds of the die. The drivers will be snapped to the manufacturing grid when placed. Thus, their final resting place may be slightly different than indicated by the cursor just before clicking into place. As a stretch item, existing drivers may need to be pushed.
• Unplace: This will unplace the selected driver(s). The driver will be removed from the display and added to the unplaced drivers list for placement back into the die in the future. Any die pads belonging to the drivers being unplaced will be removed from the symbol at the same time.
• Align: After selecting drivers and picking the align command, the user must select an object to align to. This could be a line, such as the edge of the die, or could be the edge of another driver. All selected drivers will then have their nearest edge aligned with the selected reference item (and adjusted to ensure the driver stays on the manufacturing grid). If there are site rows in the design, it should also be possible to align the drivers to the site row.
• Swap: Select two drivers, then do an RMB swap, or select one driver, RMB swap, and then select the second driver to swap with. The two drivers will swap locations, with each snapping into place such that their outer edge (facing out from the die center) is at the same distance from the die edge as the old driver was. This is to account for possible differences in the size of the two drivers. This new position will be snapped to the manufacturing grid as a final step. If the user swaps a driver onto a position within a site row, it will snap to position according to the standard snap-to edge of the site row following its symmetry rules. This means that if we swap two different height drivers between site rows, the site row setup and placement would need to account for the possible height differences. If that has not been done and some illegal overlaps result, then the swap should fail.
• Delete: This will completely remove the driver both from the die (unplace) and from the verilog netlist for the die. This will only be available when in a feasibility die design mode, as the IC verilog netlist is considered golden data for the IC design tools. This is a stretch item for the first release.
• Copy: Similar to an "add" of a driver when selecting the component, this will create a new instance of the selected driver(s) on the cursor, which may then be placed anywhere inside the boundary of the die symbol. The new instances will initially be placed on the same net as the reference item. This feature is only available in the feasibility flow, where logic edits are permissible. This is a stretch item for the first release.
• Replace: If the user selects drivers and then the replace option, they are presented with a list of (compatible) driver definitions to choose from. Selecting a new definition will change the selected drivers and then snap them to the manufacturing grid if necessary. This capability should only be provided for feasibility dies.
• Refresh definition: This will refresh the selected driver definition(s) from the referenced LEF/OA library information in case changes have been made which impact the size and shape of the driver. This is rarely necessary unless the IC libraries are still under design.
Ministatus Panels
Fig 7: Symbol Resize Settings, Ministatus Panel
• Upper Right X/Y: The upper right coordinates for the symbol's bounding box. If the symbol is rectangular, then editing these settings will make all the necessary updates for the new symbol extents. Extents must always completely surround all pins and drivers belonging to the referenced component.
• Lower Left X/Y: The lower left coordinates for the symbol's bounding box. If the symbol is rectangular, then editing these settings will make all the necessary updates for the new symbol extents. Extents must always completely surround all pins and drivers belonging to the referenced component.
• Update symbol extents: Select this button to confirm the new symbol extents specified above. Extents which are smaller than the bounding box encompassing all the pins of the component are not allowed. If the user enters values like this, the change will not be permitted.
Note: Resizing die is not permitted for co-design dies at this time.
• Select symbol outline: Press this button to interactively select the shape in the drawing that will become the symbol's new outline. This shape should already exist where it should be for the symbol instance it belongs to. This allows you to make changes to the symbol instance's outline to add notches, etc. using the standard shape editing tools, then update the symbol definition to reflect these changes.
Fig 8: Component Pin Text Settings, Ministatus Panel
• Add text labels on pins: This button toggles whether pin text is created for each individual pin. The default setting is based on the state of the symbol (if there is text on pins, it defaults to on, otherwise defaults to off).
• Offset X/Y (Pins): This defines the offset of the text from the pin pad origin. The default is 0 in both the X and Y (so, centered on the pin origin). This offset is applied globally to all pin number text on the pins. If multiple offsets already exist for the symbol under edit, this will display ** and text positioning will be unchanged.
• Text Size (Pins): The text size to use. Displays ** if multiple sizes are currently in use. Text sizes are listed as block index plus height x width for easy reference and picking of the right size.
• Enable border numbers: This toggles the creation of border pin text. Its default state is based on the symbol's state upon entering the command. Note that this field cannot be enabled if multiple pin numbering grids are defined, unless they all inherit from the base grid, as otherwise there could be multiple entries at a given location.
• Left/Top/Right/Bottom: Which side(s) to add pin text to. This is defaulted based on the current state of the symbol upon opening the form. Normally, we recommend text be placed on the top and left sides, or all four sides, depending on the numbering pattern.
• Offset X/Y (Border): Similar to offset for the pins, but this is from the border of the symbol, rather than the pin pad origin.
• Text Size (Border): The text size to use. Displays ** if multiple sizes are currently in use. Text sizes are listed as block index plus height x width for easy reference and picking of the right size.
Fig 9: Pin Add/Move/Copy/Modify, Ministatus Panel
• Rip up routing: This option is available when moving, deleting, or swapping pins. It defaults to being disabled (as stretch etch defaults to being enabled). If set, any connected clines and vias, including bond wires, will be ripped up when the pin is moved, deleted or swapped. This affects the routing in the current database only, and does not affect any co-design databases, such as the IC db for a co-design die.
• Stretch routing: This option is available when moving pins. It defaults to being enabled. If set, any connected clines and vias, including bond wires, will be stretched to maintain connection to the pin at its new location. This affects the routing in the current database only, and does not affect any co-design databases, such as the IC db for a co-design die.
• Replace existing pins: This option is available during a pin add, move, or copy operation. If the pin being placed at the new position snaps to a grid location already in use by another pin and this option is enabled, the existing pin will be deleted to make way for the new pin. Otherwise, the existing pin remains and the new pin is deleted. This option defaults to off.
• Number: The pin number to assign to the new pin, if adding/moving/copying/modifying a single pin. If the pin is placed in an auto-numbered grid, this value will not be used. If multiple pins are selected, the user will be prompted for each subsequent pin's number, as pin numbers must be unique within the symbol. This defaults to the next available integer number.
• Name: The logical pin name assigned to this physical pin. This defaults to being the same as the pin number, and is not used for power/ground pins. If this design is associated with a schematic / table block front-end design, existing pin names may not be changed. For co-design dies, new pin names may not be specified. The user will need to select the pin name from a list of unused port names.
• Pin use: The pin use code to use for this pin. This defaults to bidirectional for new pins, but can be changed to any of the available pin use codes. If multiple pins are selected for a move/copy/modify operation, then "**" is displayed initially and no pin use will change for any pin if ** is displayed. If this design is associated with a schematic / table block front-end design and this is NOT a co-design component, existing pin uses on the function definition cannot be changed. Therefore, the affect of changing the pin use will be to put the PIN_USE property with the new value on the corresponding pin of all instances of the component.
• Swap code: The swap code to assign to this pin. Note that all pins of the same swap code must have compatible pin uses. If the swap code you enter is in conflict with other pins on the component, it will be rejected. The swap code 0 is reserved for indicating pins are not swappable. The default here is 0, unless pins from multiple swap groups are selected, in which case "**" is shown initially. If this design is associated with a schematic / table block front-end design, existing pin swap codes on the component cannot be changed, so this will be disallowed.
• Auto Select related net: Only available for co-design objects. When enabled, this option will cause the related net in the other design space to be automatically selected when the user changes a net. For example, picking the package net "ABC" would cause the IC net to change to the corresponding "abc" and vice versa.
• Net: The net to assign to this pin. Pull-down lists all available nets, sorted by net name. You may also type the name directly, or type a wildcard expression into the field to filter the drop-down list to relevant nets. The default value is "dummy net" for adding new pins, or maintaining the current net on other operations. If pins of multiple nets are selected, "**" is shown initially.
For co-design components, assigning a net to a symbol/component pin should have the effect of associating the function pin with that signal to this pin. If there was an existing function pin assigned for this pin, the function pin will have its component pin assignment removed, but the function pin itself remains. The VERILOG_PORT_NAME property must be properly updated onto the component pin definition at the time of assignment.
If the function pin for this net is already assigned to a component pin of this symbol, a new function pin should be created with a unique pin name (<existing name>.EXTRA1, for example), and the VERILOG_PORT_NAME property must be assigned.
If no function pin exists for the selected net, the assignment should not be permitted. Ideally, the net list should be filtered to only list those nets which can legally be assigned to the selected pin(s).
• IC Net: This shows the IC net name that is assigned / to be assigned to the selected item. "**" indicates multiple selections, and the user may browse or type in the net name to be used. Works very similar to the Net field, but with the IC's netlist.
• Padstack: The padstack to use for this pin. The user may either select from the drop-down list or press the "…" button to bring up the standard IC Packaging padstack definition form to define a simple padstack, or browse for one from the library. If pins using multiple padstacks are selected, "**" is shown initially.
• Rotation: This is the rotation to apply to the pin when it is placed at its current location. Choices are North, South, East, and West orientation, as well as "Automatic" (rotates to face the nearest die side) and "Relative", which keeps the same rotation relative to the die side the pin is closest to. An example of relative would be that a pin rotated 90 degrees on the east would rotated to 180 degrees on the north side. This defaults to "Automatic".
• LEF Macro: The LEF bump macro assigned for this pin (co-design dies only). The user may select the bump macro from the pull-down list in this field and that macro will be assigned for this bump in the linked IC database / die abstract.
• Grid: This read-only field displays the name of the symbol grid to which this pin currently belongs. Again, "**" is used to indicate pins from multiple grids are selected.
Fig 10: Grid Add / Pitch Settings, Ministatus Panel
Note: Grid pitch settings in the form are given based on the instance selected for edit, not the symbol definition. For example, if a symbol def had two instances, one placed at 0-degree rotation and the other rotated 90 degrees, the X and Y pitches would be swapped when viewing the two symbols. This should be transparent to the user, as the form displays a WYSIWYG view of the active symbol grid.
• Name: The name assigned to this grid. This value is not used for anything other than easier identification through show element, etc. We will require grid names to be unique. The name "Base" is reserved for the base grid.
• Priority: The priority for this grid. If two grids overlap, the higher priority grid is used for snapping in the overlap region. This defaults to the next lowest available priority. The base grid always has the lowest priority.
• Staggered grid: This checkbox determines whether the grid is staggered or full. A staggered pin grid has every second grid location removed.
• X/Y Enable: These check boxes determine whether their corresponding pin pitch setting is enabled or not. If the pitch is disabled, then the only restriction in that direction is that no two pins may exist at the exact same location. We do not generally advise turning off the pitch of the base grid, but rather turning it off in specific regions as needed, such as for a SERDES macro block (die) or an RF component. Defaults to disabled until the user defines a pitch.
• Pitch: The actual spacing between grid points in this grid in the axis defined. This defaults to 1 database unit, and should be configured at the same time the pin pitch is enabled.
• Edge inside: This is the distance from the corner of the grid's bounding rectangle to the first legal grid point. For example, you might want the base grid to have an edge inset of 100um to keep pins from getting too close to the edge of the component. The default value is 0 database units, meaning the connect point on pins (most commonly the center) can be placed right up to the grid boundary.
• Inset corner: The corner from which the edge inset is measured. Choices are top left, top right, bottom left, and bottom right. This defaults to the bottom left.
Fig 11: Grid Add / Pin Number Settings, Ministatus Panel
Note: Grid pin numbering settings in the form are given based on the instance selected for edit, not the symbol definition, just as with pin pitch settings. This should be transparent to the user, as the form displays a WYSIWYG view of the active symbol grid.
• Name: Read only, for identifying the grid to the user so they know which one is under edit.
• Priority: Read only, for identifying the grid to the user so they know which one is under edit.
• Scheme: The pin numbering scheme to be used. This ranges from Customized (user must manually enter every pin name), to Inherit from Base Grid, all the way to patterns like serpentine and spiral numbering. An exhaustive list is available upon request, but this list often grows.
• First pin: The corner of the grid where pin numbering should commence for any auto-numbering pattern like horizontal or vertical. This defaults to top left.
• Prefix: A text prefix to add to the pin label. This defaults to be an empty string. For example, you may want all pins in the core to be prefixed with "CORE". This is not normally used.
• Start at: This is the first pin number to be used in this grid, based on the scheme and prefix. If multiple grids in the component use the same numbering scheme, change the start at number to prevent duplicate physical pin numbers. For example, if you have one grid that starts at A1, your second grid may need to start at B13.
• Pad letters (As): If using a numbering scheme that contains alpha characters, pad the alpha string so that all pin numbers are the same length (AA, AB, … BA versus A, B, … BA). Defaults to off.
• Pad numbers (0s): If using a numbering scheme that contains numeric characters, pad the numeric string so that all pin numbers are the same length (00, 01, … 19 versus 0, 1, … 19). Defaults to off.
• Label with letters before numbers: If enabled, the alpha part of the pin number comes before the numeric part (A1 versus 1A). This defaults to on.
• Omit letters per JEDEC standard: If enabled, some letters are removed from the alpha sequence, such as I and O, to prevent confusion with their similar-looking numeric values (1/0). This defaults to off.
• Label unused grid positions: Defaults to on. If this is disabled, for patterns like horizontal, vertical, and spiral, if a grid position has no pin, then its label index is used by the next location that actually has a pin.
• Label non-staggered positions: If using a staggered pin pattern, enable this field to reserve pin numbers for the non-staggered positions, even though no pin can ever be placed there. This makes for more easily understandable numbering sequences for some patterns like serpentine. Defaults to off.
Fig 12: Driver Add, Ministatus Panel
• Bubble: The bubble mode to use when placing drivers. This can be one of Clockwise, Counter-Clockwise, Both, or None. The bubble determines what drivers are pushed/shoved to prevent overlaps with the driver being modified when it is placed into its new position. Default is "None."
• Mirror: The mirror type to use when this driver is placed. Defaults to not-mirrored for unmirrored dies (ie chip-up wirebond) or mirrored for chip-down dies like a flip-chip, chip down die.
• Rotation: The rotation to use when this driver is placed down. Defaults to Automatic. Choices are the same as for pins (North, South, East, West, Automatic, and Relative).
• Size: Read-only field shows the size of the driver definition (or set of definitions) currently on the cursor. This is useful for hand-computing the placement for the reference pick.
• Current IC Library: Shows the currently active IC library (co-design dies only). The user may use this pull-down to activate a different IC library, which will update the available driver definitions tree.
• IC Library Manager: Click this button to open the IC Library Manager (feasibility mode co-design dies only). See Fspec for IC Library Manager rework in 16.4 for more details on this tool and proposed changes.
• Available Definitions: This tree shows all the driver definitions in the current IC library. The user selects the driver definitions to be added. As each is clicked, it is added to the cursor to the immediate right of the last selected driver, to allow for multiple drivers to be added at the same time (this replicates existing behavior).
Fig 13: Driver Place, Ministatus Panel
All fields are the same, and function the same, as the Driver Add panel shown in Figure 12. The only difference is the tree view shows the unplaced drivers instead of the available driver definitions.
• Unplaced Drivers: This tree shows all the unplaced drivers for the active co-design die component. The user selects the drivers to be placed. As each is clicked, it is added to the cursor to the immediate right of the last selected driver, to allow for multiple drivers to be placed at the same time (this replicates existing behavior).
Fig 14: Driver Move, Ministatus Panel
Again, all fields are the same, and function the same, as those in Figure 12. The only difference is the stretch connections field.
• Stretch connections: If this button is enabled, a driver, when moved, will stretch all routing clines and vias connected to the I/O pads to the new destination. This may cause DRCs, depending on where the driver is moved to. The default setting is off, and routing will be ripped up.
Stretching only applies to routing inside the primary database (e.g. package routing in SiP). Routing in the other design, such as RDL routing on the IC, will NOT be modified.
User Preferences
To add even more control over the tool there are some User Preferences that can be set. Go to User Preferences Editor > IC_Packaging > Symbol_editor. Here are preferences that allow the users to set the double click and drag options in symbol editor App mode.
symed_dblclk_comp_op (please read the summary description for more details on each)
symed_dblclk_driver_op
symed_dblclk_grid_op
symed_dblclk_pin_op
symed_dblclk_drag_driver_op
symed_drag_pin_op
Log File
Currently, the Die Editor and BGA Editor commands provide log files which log all changes made to the component under edit. However, in symbol editor application mode, this is much more difficult to do, as the user could be editing a different component or symbol with each operation. As such, there will be no distinct log file associated with the overall symbol editing application mod. The journal file will continue to log sequential operations for the user's reference.
I look forward to your feedback on this new 16.5 capability!
Jerry "
GenPart" Grzenia
